SN74ALVC16245 16-bit bus transceiver with 3-state outputs scas419d january 1993 revised august 1995 1 post office box 655303 ? dallas, texas 75265 epic ? (enhanced-performance implanted cmos) submicron process member of the texas instruments widebus ? family esd protection exceeds 2000 v per mil-std-883c, method 3015; exceeds 200 v using machine model (c = 200 pf, r = 0) latch-up performance exceeds 250 ma per jedec standard jesd-17 bus hold on data inputs eliminates the need for external pullup / pulldown resistors package options include plastic 300-mil shrink small-outline (dl) and thin shrink small-outline (dgg) packages description the SN74ALVC16245 16-bit (dual-octal) noninverting bus transceiver is designed for 2.3-v to 3.6-v v cc operation; it is tested at 2.5-v, 2.7-v, and 3.3-v v cc . the SN74ALVC16245 is designed for asynchronous communication between data buses. the control-function implementation minimizes external timing requirements. this device can be used as two 8-bit transceivers or one 16-bit transceiver. it allows data transmission from the a bus to the b bus or from the b bus to the a bus, depending on the logic level at the direction-control (dir) input. the output-enable (oe ) input can be used to disable the device so that the buses are effectively isolated. active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. the SN74ALVC16245 is available in ti's shrink small-outline (dl) and thin shrink small-outline (dgg) packages, which provide twice the i/o pin count and functionality of standard small-outline packages in the same printed-circuit-board area. the SN74ALVC16245 is characterized for operation from 40 c to 85 c. function table (each 8-bit section) inputs operation oe dir operation l l b data to a bus l h a data to b bus h x isolation please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. dgg or dl package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1dir 1b1 1b2 gnd 1b3 1b4 v cc 1b5 1b6 gnd 1b7 1b8 2b1 2b2 gnd 2b3 2b4 v cc 2b5 2b6 gnd 2b7 2b8 2dir 1oe 1a1 1a2 gnd 1a3 1a4 v cc 1a5 1a6 gnd 1a7 1a8 2a1 2a2 gnd 2a3 2a4 v cc 2a5 2a6 gnd 2a7 2a8 2oe production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. copyright ? 1995, texas instruments incorporated epic and widebus are trademarks of texas instruments incorporated.
SN74ALVC16245 16-bit bus transceiver with 3-state outputs scas419d january 1993 revised august 1995 2 post office box 655303 ? dallas, texas 75265 logic symbol 2 logic diagram (positive logic) 1a2 46 1a3 44 1a4 43 1a5 41 1a6 40 1a7 38 1a8 37 2a2 35 2a3 33 2a4 32 2a5 30 2a6 29 2a7 27 2a8 26 1oe 2oe 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. to seven other channels 1dir 1a1 1b1 1oe 1 47 2 48 to seven other channels 2dir 2a1 2b1 2oe 24 36 13 25 1a1 47 g3 48 3 en1 [ba] 1 1dir 3 en2 [ab] g6 25 6 en4 [ba] 24 2dir 6 en5 [ab] 1b1 2 1b2 3 1b3 5 1b4 6 1b5 8 1b6 9 1b7 11 1b8 12 2a1 36 2b1 13 2b2 14 2b3 16 2b4 17 2b5 19 2b6 20 2b7 22 2b8 23 1 2 5 4
SN74ALVC16245 16-bit bus transceiver with 3-state outputs scas419d january 1993 revised august 1995 3 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc 0.5 v to 4.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, vi: except i/o ports (see note 1) 0.5 v to v cc + 4.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . i/o ports (see notes 1 and 2) 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o (see notes 1 and 2) 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 100 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum power dissipation at t a = 55 c (in still air) (see note 3): dgg package 0.85 w . . . . . . . . . . . . . . . dl package 1.2 w . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observe d. 2. this value is limited to 4.6 v maximum. 3. the maximum package power dissipation is calculated using a junction temperature of 150 c and a board trace length of 750 mils. for more information, refer to the package thermal considerations application note in the 1994 abt advanced bicmos technology data book , literature number scbd002b. recommended operating conditions (see note 4) min max unit v cc supply voltage 2.3 3.6 v v ih high level in p ut voltage v cc = 2.3 v to 2.7 v 1.7 v v ih high - le v el inp u t v oltage v cc = 2.7 v to 3.6 v 2 v v il low level in p ut voltage v cc = 2.3 v to 2.7 v 0.7 v v il lo w- le v el inp u t v oltage v cc = 2.7 v to 3.6 v 0.8 v v i input voltage 0 v cc v v o output voltage 0 v cc v v cc = 2.3 v 12 i oh high-level output current v cc = 2.7 v 12 ma v cc = 3 v 24 v cc = 2.3 v 12 i ol low-level output current v cc = 2.7 v 12 ma v cc = 3 v 24 d t/ d v input transition rise or fall rate 0 10 ns/ v t a operating free-air temperature 40 85 c note 4: unused control inputs must be held high or low to prevent them from floating.
SN74ALVC16245 16-bit bus transceiver with 3-state outputs scas419d january 1993 revised august 1995 4 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v 2 t a = 40 c to 85 c unit parameter test conditions v cc 2 min typ 3 max unit i oh = 100 m a min to max v cc 0.2 i oh = 6 ma, v ih = 1.7 v 2.3 v 2.0 v oh v ih = 1.7 v 2.3 v 1.7 v v oh i oh = 12 ma v ih = 2 v 2.7 v 2.2 v v ih = 2 v 3 v 2.4 i oh = 24 ma, v ih = 2 v 3 v 2 i ol = 100 m a min to max 0.2 i ol = 6 ma, v il = 0.7 v 2.3 v 0.4 v ol i ol =12ma v il = 0.7 v 2.3 v 0.7 v i ol = 12 ma v il = 0.8 v 2.7 v 0.4 i ol = 24 ma, v il = 0.8 v 3 v 0.55 i i v i = v cc or gnd 3.6 v 5 m a v i = 0.7 v 23v 45 i hld v i = 1.7 v 2 . 3 v 45 m a i hold v i = 0.8 v 3v 75 m a v i = 2 v 3 v 75 i oz v o = v cc or gnd 3.6 v 10 m a i cc v i = v cc or gnd, i o = 0 3.6 v 40 m a i cc v cc = 3 v to 3.6 v, other inputs at v cc or gnd one input at v cc 0.6 v, 750 m a c i control inputs v i = v cc or gnd 3.3 v 4 pf c io a or b ports v o = v cc or gnd 3.3 v 9 pf 2 for conditions shown as min or max, use the appropriate values under recommended operating conditions. 3 all typical values are at v cc = 3.3 v. for i/o ports, the parameter i oz includes the input leakage current. switching characteristics over recommended operating free-air temperature range, c l = 50 pf (unless otherwise noted) (see figures 1 and 2) parameter from (input) to (output) v cc = 2.5 v 0.2 v v cc = 2.7 v v cc = 3.3 v 0.3 v unit (input) (output) min max min max min max t pd a or b b or a 1 5 4 1 3.6 ns t en oe b or a 1 6.8 6 1 5 ns t dis oe b or a 1 6 5.2 1 5 ns operating characteristics, t a = 25 c parameter test conditions v cc = 2.5 v 0.2 v v cc = 3.3 v 0.3 v unit typ typ c d power dissi p ation ca p acitance outputs enabled c l =50 p f f=10mhz 22 29 p f c pd po w er dissipation capacitance outputs disabled c l = 50 pf , f = 10 mh z 4 5 pf
SN74ALVC16245 16-bit bus transceiver with 3-state outputs scas419d january 1993 revised august 1995 5 post office box 655303 ? dallas, texas 75265 parameter measurement information v cc = 2.5 v 0.2 v v oh v ol t h t su from output under test c l = 50 pf (see note a) load circuit s1 4.6 v open gnd 500 w 500 w t plh t phl output control (low-level enabling) output waveform 1 s1 at 4.6 v (see note b) output waveform 2 s1 at gnd (see note b) t pzl t pzh t plz t phz 1.2 v 1.2 v 1.2 v 1.2 v 2.3 v 0 v 1.2 v 1.2 v v oh v ol 0 v 1.2 v v ol + 0.3 v 1.2 v v oh 0.3 v 0 v 1.2 v 2.3 v 0 v 1.2 v 1.2 v 0 v 2.3 v 0 v 1.2 v 1.2 v t w input 2.3 v 2.3 v 2.3 v voltage waveforms setup and hold times voltage waveforms propagation delay times voltage waveforms pulse duration voltage waveforms enable and disable times timing input data input output input t pd t plz /t pzl t phz /t pzh open 4.6 v gnd test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 w , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . figure 1. load circuit and voltage waveforms
SN74ALVC16245 16-bit bus transceiver with 3-state outputs scas419d january 1993 revised august 1995 6 post office box 655303 ? dallas, texas 75265 parameter measurement information v cc = 2.7 v and 3.3 v 0.3 v v oh v ol t h t su from output under test c l = 50 pf (see note a) load circuit s1 6 v open gnd 500 w 500 w t plh t phl output control (low-level enabling) output waveform 1 s1 at 6 v (see note b) output waveform 2 s1 at gnd (see note b) t pzl t pzh t plz t phz 1.5 v 1.5 v 1.5 v 1.5 v 2.7 v 0 v 1.5 v 1.5 v v oh v ol 0 v 1.5 v v ol + 0.3 v 1.5 v v oh 0.3 v 0 v 1.5 v 2.7 v 0 v 1.5 v 1.5 v 0 v 2.7 v 0 v 1.5 v 1.5 v t w input 2.7 v 2.7 v 3 v voltage waveforms setup and hold times voltage waveforms propagation delay times voltage waveforms pulse duration voltage waveforms enable and disable times timing input data input output input t pd t plz /t pzl t phz /t pzh open 6 v gnd test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 w , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . figure 2. load circuit and voltage waveforms
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 1998, texas instruments incorporated
|
